Nonvolatile memory is a type of digital memory that can retain data in the absence of power. Generally speaking, nonvolatile memory is relatively cheap, but it is also relatively slow when compared to other types of memory, such as random access memory (“RAM”). Given this disadvantage in performance, the memory industry continually strives to improve performance characteristics of nonvolatile memory, so as to enable its use as a cheaper replacement for RAM.
Some nonvolatile memory types are slower than others, and require greater management overhead than others. This management overhead contributes to the slower performance. For example, some types of nonvolatile memory are characterized by a program/erase (“P/E”) asymmetry, e.g., memory types such as flash memory and shingled magnetic recording drives have units of minimal write size (“physical pages”) and units of minimal erase size (“erase units” or “EU”), with an EU consisting of multiple physical pages. If it is desired to update data stored in a physical page, the old data usually cannot be overwritten and instead, a memory controller typically identifies a new destination location to receive the overwritten data and updates state for the old physical location as being “released;” a given EU can then be erased (i.e., reset to a writeable state) once all of its constituent pages have been released. In part because it cannot overwrite data, the memory controller also typically maintains complex address translation tables which are used to map a logical address used by a host to the true physical location where data is stored. Memory types characterized by P/E asymmetry often require extensive maintenance operations including garbage collection and dedicated erase processes (which return previously-written memory to a writeable state). As a second example, some types of nonvolatile memory are also characterized by the need for program-verify cycles, that is, where the memory device attempts to correctly program a physical page's worth of data (e.g., 4k bytes) and then attempts to verify proper programming using a comparison operation with write data still held in a buffer; in the event of error, the memory device again attempts to again program those individual memory cells which did not correctly program in the previous programming operation. Sometimes, a number of such program-verify operations can be required, with this number generally increasing as a memory's life progresses. This long and variable programming time can make write operations unpredictable, making it difficult for a memory controller to pipeline memory commands, i.e., typically a new operation cannot be sent to a memory array by a memory controller until it is known that a previous write operation in that memory array has actually completed which, typically, is ascertained by polling the memory device and confirming completion or otherwise looking for the memory's assertion of a programming completion signal. Flash memory is a good example of memory which requires these various operations. The required use of these operations contributes to the slow performance of nonvolatile memory because, for example, the need for controller-based address translation can slow memory operations and because maintenance operations can result in a memory array being in-use in a manner that “collides” with a host need to access data in that memory array; further still, a host typically has little visibility into the true physical configuration of memory managed by a given memory controller, and so typically cannot efficiently schedule operations for parallel operation.
Techniques are needed for improving the performance of nonvolatile memory, including memory characterized by one or more of the characteristics referenced above; as noted, such improvement would increase the ability to use such nonvolatile memory as a substitute for RAM. Further, techniques are needed for improving the ability of a host to gain insight into the memory configuration and so efficiently schedule commands sent to a memory controller for that memory. The present invention addresses these needs and provides further, related advantages.
The subject matter defined by the enumerated claims may be better understood by referring to the following detailed description, which should be read in conjunction with the accompanying drawings. This description of one or more particular embodiments, set out below to enable one to build and use various implementations of the technology set forth by the claims, is not intended to limit the enumerated claims, but to exemplify their application to certain methods and devices. The description set forth below exemplifies techniques that can be practiced in one embodiment by a host, in another embodiment by a memory controller (e.g., within a single drive or across multiple drives), in another embodiment by a flash memory device (e.g., die or integrated circuit) and in yet another embodiment by a host or memory controller cooperating with one or more other circuits. This disclosure also provides improved designs for a memory controller, host, memory devices, a memory system, a subsystem (such as a drive, e.g., a solid state drive or “SSD”), and associated circuitry, firmware, software and/or other processing logic. The disclosed techniques can also be implemented as instructions for fabricating an integrated circuit (e.g., as a circuit design file or as a field programmable gate array or “FPGA” configuration). While the specific examples are presented, particularly in the context of flash memory, the principles described herein may also be applied to other methods, devices and systems as well.